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3 Days ago

Senior Technical Lead - FPGA Desing Engineer

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Bangalore, Karnataka, India
Manufacturing & Industrial
Full-Time
Thales

Overview

Location: Bangalore, India

In fast changing markets, customers worldwide rely on Thales. Thales is a business where brilliant people from all over the world come together to share ideas and inspire each other. In aerospace, transportation, defence, security and space, our architects design innovative solutions that make our tomorrow's possible.

Present in India since 1953, Thales is headquartered in Noida, Uttar Pradesh, and has operational offices and sites spread across Bengaluru, Delhi, Gurugram, Hyderabad, Mumbai, Pune among others. Over 1800 employees are working with Thales and its joint ventures in India. Since the beginning, Thales has been playing an essential role in India’s growth story by sharing its technologies and expertise in Defence, Transport, Aerospace and Digital Identity and Security markets.

Senior Technical Lead - Design Optimization for FPGAs

Essential Specifications:

  • Masters / PhD in Electrical Engineering, Computer Science, or a related
  • field with at least 10 years of experience on FPGA based designs, design
  • optimizations and problem solving.
  • Strong understanding of digital logic fundamentals and computer
  • architecture.
  • Proficiency in FPGA programming techniques.
  • Experience with timing analysis and optimization for FPGA designs.
  • Excellent skills in Verilog programming language.
  • Experience using Vivado or Questa Sim EDA tools.


Desirable Specifications:

  • Knowledge of RISC-V architecture.
  • Effective presentation skills to communicate complex ideas.
  • Familiarity with verification techniques using UVM.


Responsibilities:

  • Work on a variety of design optimization problems for FPGA-based
  • systems.
  • Collaborate with the team to develop innovative solutions for performance
  • improvement, power optimization, and area reduction.
  • Implement designs using FPGA programming languages like Verilog.
  • Conduct timing analysis and optimize designs to meet performance
  • requirements.
  • Utilize Vivado or Questa Sim EDA tools for design and validation.
  • Stay informed about the latest advancements in FPGA design optimization.
  • Document research findings and project progress accurately.
  • Participate in team meetings, providing valuable insights and suggestions.

Note: The job description includes both essential and desirable specifications.

Meeting all the desirable specifications is not mandatory but will enhance the

candidate's application

At Thales we provide CAREERS and not only jobs. With Thales employing 80,000 employees in 68 countries our mobility policy enables thousands of employees each year to develop their careers at home and abroad, in their existing areas of expertise or by branching out into new fields. Together we believe that embracing flexibility is a smarter way of working. Great journeys start here, apply now!

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