Principal ASIC Architect / Technical Lead

Overview

Domain Hardware/Chip Design & Embedded Software

Location USA - Maryland, Baltimore, Boise Idaho

Experience 8 - 30 Years

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What You’ll Do

• Be the technical lead of a cross-functional team (hardware engineering, software developers, verification engineers) to define, design, simulate, fabricate and iterate a RISC-V Application-Specific Integrated Circuit (ASIC) System on a Chip (SoC) product for defense and commercial applications based on our client's secure RISC-V CPU. The RTL already exists - the major task is transferring that capability to a functioning, production-ready ASIC. Tasks ahead will follow the latest industry-standard design methodologies to finalizing the RTL code, synthesis, place-and-route and verification.
• Be the primary technical interface with pilot customers, the internal engineering team and external subcontracted specialists to define and document product features, use cases, and functional requirements
• Finalize and maintain the microarchitecture definition and associated documentation (complete ASIC specification, requirements and verification plan), including performance, I/O, power consumption, area utilization, recurring cost and security functionality
• Develop and oversee the implementation of a comprehensive verification strategy including testbench development, functional verification and performance verification. Ensure the verification team has adequate coverage and highest probability of first-pass success.
• Continuously evaluate new ASIC technologies, design methodologies for possible incorporation into the design.
• Prioritize and schedule a product roadmap that defines the inclusion of technical features to align with timing of market need and competitive advantage
• Decompose the product plan into actionable and trackable tasks, including design reviews and demonstrations that the team can execute to
• Identify strategic partners to assist in the development, marketing, and sustainment of the product to augment internal capabilities
  
  

• Must have proven work experience designing and fabricating an ASIC
• More than 8 years of ASIC design and architecture experience is required
• Solid technical background with understanding and/or hands-on experience in ASIC product development
• At minimum a BS in Computer Engineering, Computer Science, Electrical Engineering or related field
• Strong proficiency in RTL coding (Verilog or VHDL), ASIC design flow, and EDA tools
• In-depth knowledge of ASIC architectures, including digital logic design, clocking methodologies, and low-power design techniques
• Experience with industry-standard ASIC design methodologies (e.g., RTL synthesis, place-and-route, timing closure) and verification methodologies (e.g., UVM, SystemVerilog)
• Strong problem solving skills and willingness to roll up one’s sleeves to get the job done
  
  

• US Security Clearance, Active or current within the last two years
• In-depth understanding of microprocessor market and processor architectures
• Working knowledge of applied cryptography and cyber security topics
• Experience applying principles of cyber security to operational technology and embedded systems