Senior Technical Lead -Fullchip, IR/EM

Overview

At Quest Global, it’s not just what we do but how and why we do it that makes us different. With over 25 years as an engineering services provider, we believe in the power of doing things differently to make the impossible possible. Our people are driven by the desire to make the world a better place—to make a positive difference that contributes to a brighter future. We bring together technologies and industries, alongside the contributions of diverse individuals who are empowered by an intentional workplace culture, to solve problems better and faster.

Key Responsibilities

10+ years of professional experience in leading power integrity and electromigration signoff for advanced SOC designs

• In-depth experience in performing full-chip static and dynamic IR drop analysis.
• Experience in identifying and debugging voltage drop hotspots.
• In-depth experience in running EM checks on signal and power nets.
• Experience in handling IR/EM closure for FinFET nodes(16nm/7nm/5nm/3nm).
• Strong expertise in power grid design and optimization.
• Must have experience in Siemens EDA-mPower, Synopsys-RedHawk-SC, Cadence Design Systems-Voltus.
  
  

We are known for our extraordinary people who make the impossible possible every day. Questians are driven by hunger, humility, and aspiration. We believe that our company culture is the key to our ability to make a true difference in every industry we reach. Our teams regularly invest time and dedicated effort into internal culture work, ensuring that all voices are heard.

We wholeheartedly believe in the diversity of thought that comes with fostering a culture rooted in respect, where everyone belongs, is valued, and feels inspired to share their ideas. We know embracing our unique differences makes us better, and that solving the worlds hardest engineering problems requires diverse ideas, perspectives, and backgrounds. We shine the brightest when we tap into the many dimensions that thrive across over 21,000 difference-makers in our workplace.

Work Experience

• 10+ years of professional experience in leading power integrity and electromigration signoff for advanced SOC designs
• In-depth experience in performing full-chip static and dynamic IR drop analysis.
• Experience in identifying and debugging voltage drop hotspots.
• In-depth experience in running EM checks on signal and power nets.
• Experience in handling IR/EM closure for FinFET nodes(16nm/7nm/5nm/3nm).
• Strong expertise in power grid design and optimization.
• Must have experience in Siemens EDA-mPower, Synopsys-RedHawk-SC, Cadence Design Systems-Voltus.